Wanhua Yu and C. D. Wright, Analysis of switching conditions of chalcogenide alloys during crystallization, J. Univ. Sci. Technol. Beijing, 13(2006), No. 5, pp. 446-449. https://doi.org/10.1016/S1005-8850(06)60090-X
Cite this article as:
Wanhua Yu and C. D. Wright, Analysis of switching conditions of chalcogenide alloys during crystallization, J. Univ. Sci. Technol. Beijing, 13(2006), No. 5, pp. 446-449. https://doi.org/10.1016/S1005-8850(06)60090-X
Wanhua Yu and C. D. Wright, Analysis of switching conditions of chalcogenide alloys during crystallization, J. Univ. Sci. Technol. Beijing, 13(2006), No. 5, pp. 446-449. https://doi.org/10.1016/S1005-8850(06)60090-X
Citation:
Wanhua Yu and C. D. Wright, Analysis of switching conditions of chalcogenide alloys during crystallization, J. Univ. Sci. Technol. Beijing, 13(2006), No. 5, pp. 446-449. https://doi.org/10.1016/S1005-8850(06)60090-X
To understand the principle and limitation of chalcogenide alloy Ge2Sb2Te5 (GST) in solid-state memory devices during crystallization,it was necessary to develop a physically realistic model that could reflect the electrical and thermal properties of these media. A novel comprehensive numerical model has been developed for simulating these memory devices,which describes the electrical and thermal behavior using the solution of the nonlinear,time-dependent electrical and heat conduction equation. The fi-nite-difference-time-domain technique was adopted to compute the electrical field and heat distribution in the device. Several con-tributing factors that affect the crystallization switching process such as the geometry of the GST layer,temperature and electric field dependency of the electrical conductivity have been discussed. The results of the simulations were then used to provide critical guidelines for fabrication and optimization of the device performance.